.equ PLAN_MODE,0
 .equ PLAN_TTL,128
| Hard CPU plans a real accepted pass into a native catch-and-release.
| Pending target F08C / TTL F08E; all position/velocity/attributes stay native.
 .text
 .globl _start
_start:
 bra.w launch
 bra.w frame
 bra.w clear
clear:
 clr.l 0xFFFFF08C
 rts
launch:
 move.w %d1,0xFFFFB774               | displaced final native pass velocity
 move.w %sr,-(%sp)
 movem.l %d0-%d7/%a0-%a6,-(%sp)
 movea.l %a3,%a4                    | actual passer
 movea.l %a0,%a5                    | actual accepted receiver
 btst #4,0xFFFFC2EA
 bne.w launch_done
 jsr 0x2D880C
 tst.w %d0
 beq.w launch_done
 btst #2,0xFFFFC2FA
 bne.w launch_done
 tst.w 0x34(%a5)
 ble.w launch_done
 btst #3,0x62(%a5)
 bne.w launch_done
 btst #2,0x63(%a5)
 bne.w launch_done
 move.w 0x52(%a5),%d0
 cmpi.w #11,%d0
 bhi.w launch_done
 move.w 0x52(%a4),%d1
 subq.w #6,%d0
 subq.w #6,%d1
 eor.w %d1,%d0
 bmi.w launch_done
 movea.l %a5,%a3
 move.w 0x14(%a3),%d5
 btst #7,0x62(%a3)
 bne.s receive_depth
 neg.w %d5
receive_depth:
 cmpi.w #160,%d5
 blt.w launch_done
 cmpi.w #252,%d5
 bgt.w launch_done
 move.w (%a3),%d4
 bpl.s receiver_abs
 neg.w %d4
receiver_abs:
 cmpi.w #92,%d4
 bgt.w launch_done
 jsr 0x2DD018
 tst.w %d0
 beq.w launch_done
 bsr.w unmarked
 tst.w %d0
 beq.w launch_done
 .if PLAN_MODE
 cmpi.w #184,%d5
 blt.w launch_done
 cmpi.w #244,%d5
 bgt.w launch_done
 cmpi.w #64,%d4
 bgt.w launch_done
 lea 0xFFFFB04A,%a1
 cmpi.w #6,0x52(%a4)
 bcc.s keeper_base
 adda.w #768,%a1
keeper_base:
 moveq #5,%d7
keeper:
 tst.w 0x34(%a1)
 bne.w keeper_next
 btst #2,0x63(%a1)
 bne.w keeper_next
 move.w (%a1),%d6
 move.w (%a4),%d0
 eor.w %d6,%d0
 bmi.w launch_done
 move.w %d6,%d0
 bpl.s keeper_abs
 neg.w %d0
keeper_abs:
 cmpi.w #8,%d0
 blt.w launch_done
 cmpi.w #40,%d0
 bgt.w launch_done
 move.w 0x14(%a1),%d3
 btst #7,0x62(%a4)
 bne.s keeper_depth
 neg.w %d3
keeper_depth:
 cmpi.w #232,%d3
 blt.w launch_done
 cmpi.w #264,%d3
 bgt.w launch_done
 moveq #-16,%d0
 tst.w %d6
 bpl.s ray_post
 moveq #16,%d0
ray_post:
 sub.w (%a5),%d0
 sub.w %d5,%d3
 bmi.s planned
 muls.w %d3,%d0
 move.w #264,%d1
 sub.w %d5,%d1
 divs.w %d1,%d0
 add.w (%a5),%d0
 sub.w %d6,%d0
 bpl.s ray_abs
 neg.w %d0
ray_abs:
 cmpi.w #24,%d0
 blt.w launch_done
 bra.s planned
keeper_next:
 adda.w #128,%a1
 dbra %d7,keeper
 bra.s launch_done
 .endif
planned:
 move.w 0x52(%a5),%d0
 addq.w #1,%d0
 move.w %d0,0xFFFFF08C
 move.w #PLAN_TTL,0xFFFFF08E
launch_done:
 movem.l (%sp)+,%d0-%d7/%a0-%a6
 move.w (%sp)+,%ccr
 rts
| Receiver must remain unmarked; no keeper is treated as a checking skater.
unmarked:
 movem.l %d1-%d3/%d7/%a1,-(%sp)
 lea 0xFFFFB04A,%a1
 cmpi.w #6,0x52(%a3)
 bcc.s mark_base
 adda.w #768,%a1
mark_base:
 moveq #5,%d7
mark_loop:
 tst.w 0x34(%a1)
 ble.s mark_next
 btst #2,0x63(%a1)
 bne.s mark_next
 move.w (%a1),%d1
 sub.w (%a3),%d1
 muls.w %d1,%d1
 move.w 0x14(%a1),%d2
 sub.w 0x14(%a3),%d2
 muls.w %d2,%d2
 add.l %d2,%d1
 cmpi.l #676,%d1
 blo.s marked
mark_next:
 adda.w #128,%a1
 dbra %d7,mark_loop
 moveq #1,%d0
 bra.s mark_done
marked:
 moveq #0,%d0
mark_done:
 movem.l (%sp)+,%d1-%d3/%d7/%a1
 rts
frame:
 tst.w 0xFFFFF08C
 beq.w frame_empty
 move.w %sr,-(%sp)
 movem.l %d0-%d7/%a0-%a6,-(%sp)
 btst #4,0xFFFFC2EA
 bne.w frame_clear
 subq.w #1,0xFFFFF08E
 bmi.w frame_clear
 move.w 0xFFFFF08C,%d7
 subq.w #1,%d7
 cmpi.w #11,%d7
 bhi.w frame_clear
 jsr 0x2DD680                       | only real ownership / valid approaching pass
 cmp.w %d2,%d7
 bne.w frame_clear
 move.w %d7,%d0
 lsl.w #7,%d0
 lea 0xFFFFB04A,%a3
 adda.w %d0,%a3
 jsr 0x2DD014
 tst.w %d0
 beq.s frame_not_ready
 bsr.w unmarked
 tst.w %d0
 beq.s frame_not_ready
 move.w #0x5042,0xFFFFF086
 move.w 0xFFFFF08C,0xFFFFF088
 move.w 0xFFFFF08E,0xFFFFF08A
 bra.s frame_clear
frame_not_ready:
 cmp.w 0xFFFFB7AA,%d7              | blocked on actual catch: leave native decisions
 beq.s frame_clear
 bra.s frame_done
frame_clear:
 clr.l 0xFFFFF08C
frame_done:
 movem.l (%sp)+,%d0-%d7/%a0-%a6
 move.w (%sp)+,%ccr
frame_empty:
 rts