| intro.s -- fix 12: jdc's own intro picture instead of the hack's centre-ice screen, and no title screen.
| Assembled at $2FE280 by build.sh; the picture (introimg.py -> data/intro.bin) goes to $2A0000 (patch.py).
| _start replaces the centre-ice screen $FED70 (called from $771E): the same set-up (H40, plane addresses), then the
| tiles straight to VRAM from tile 1, palette 0 and the map through the game's $1169A, and the same fade in and wait
| (80 x 4 frames or a button, $11176). seed replaces "jsr $FF042" at $172F4 (the title screen with the player in red):
| it only keeps what the title did for the random numbers ($D066/$D068 from the HV counter); then the main menu follows.

        .equ    DATA,     0x2A0000       | palette (32 bytes), map (width, height, 40*28 words), tile count, tiles
        .equ    MAP,      DATA+32
        .equ    TILES,    MAP+4+2*40*28

        .text
        .globl  _start
_start: bra.w   intro                   | +0: hook at $771E
        bra.w   seed                    | +4: hook at $172F4
intro:  move.l  #0x15E4C,0xFFB03A       | as $FED70
        bclr    #1,0xFFBF78             | H40
        move.w  #5,0xFFB00E
        move.w  #0xA000,0xFFB008
        move.w  #7,0xFFB00A
        move.w  #0xC000,0xFFB004
        move.w  #7,0xFFB006
        move.w  #0xF000,0xFFB00C
        move.w  #0xF800,0xFFB002
        move.w  #0xFC00,0xFFB000
        jsr     0x10F32
        movea.l #0xFFBD28,%a0           | palette buffer: black
        moveq   #31,%d1
1:      clr.l   (%a0)+
        dbra    %d1,1b
        jsr     0x115AA                 | VDP registers, VRAM cleared
        move.w  %sr,-(%sp)
        move.w  #0x2700,%sr
        move.l  #0x40200000,0xC00004    | VRAM write $0020 (tile 1)
        lea     TILES,%a0
        move.w  (%a0)+,%d1
        lsl.w   #3,%d1                  | 8 longs per tile
        subq.w  #1,%d1
2:      move.l  (%a0)+,0xC00000
        dbra    %d1,2b
        lea     DATA,%a0                | palette 0 into the game's palette buffer (the fade copies it to CRAM)
        movea.l #0xFFBD28,%a1
        moveq   #15,%d1
5:      move.w  (%a0)+,(%a1)+
        dbra    %d1,5b
        move.w  #0x2700,%sr             | map: plane A ($C000, 128 cells per row), and plane B ($A000) emptied
        lea     MAP+4,%a0
        moveq   #0,%d4                  | row
6:      move.w  %d4,%d2
        lsl.w   #8,%d2                  | row * 256 bytes
        move.w  %d2,%d3
        addi.w  #0xC000,%d2
        bsr.s   vaddr
        moveq   #39,%d1
7:      move.w  (%a0)+,0xC00000
        dbra    %d1,7b
        addi.w  #0xA000,%d3
        move.w  %d3,%d2
        bsr.s   vaddr
        moveq   #63,%d1
8:      move.w  #0,0xC00000
        dbra    %d1,8b
        addq.w  #1,%d4
        cmpi.w  #28,%d4
        blt.s   6b
        move.w  (%sp)+,%sr
        move.w  #0x18,0xFFBD26          | fade in, then wait as the original
        move.w  #0x2500,%sr
        move.w  #0x50,0xFFD066
3:      moveq   #4,%d0
        jsr     0x11176
        tst.w   %d1
        bne.s   4f
        subq.w  #1,0xFFD066
        bpl.s   3b
4:      move.w  #0x2700,%sr
        rts

| vaddr: d2 = VRAM address -> VDP write address set
vaddr:  move.l  %d2,-(%sp)
        andi.l  #0xFFFF,%d2
        move.l  %d2,%d0
        andi.w  #0x3FFF,%d0
        ori.w   #0x4000,%d0
        swap    %d0
        lsr.w   #8,%d2
        lsr.w   #6,%d2                  | address >> 14
        move.w  %d2,%d0
        move.l  %d0,0xC00004
        move.l  (%sp)+,%d2
        rts

seed:   move.w  0xC00008,0xFFD066       | what $FF042 did first (random seeds), without its screens
        move.w  0xC00008,0xFFD068
        rts